Matt Keener is the lead hardware designer at Pattern Computer Inc., a startup in stealth mode, where he is responsible for hardware design and architecture.

Matt is an expert in embedded systems and logic design, with a focus on hardware architecture design, bring-up, and debugging. He has extensive experience in designing logic in application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs); designing printed circuit boards (PCBs) for high-speed digital signaling; and firmware for control of both. Matt's experience spans application-specific timing and control logic up to system-on-chip designs that include embedded processors. He also has research experience in semiconductor physics and biomedical engineering, with a focus on biosensors.

Prior to PCI, Matt worked at IBM, National Instruments, Ohio State University, and GE Aircraft Engines. Throughout his career, he has developed a reputation for providing well-researched solutions. He has led and participated in various cross-functional projects, working across continents with team members with various levels of experience, always delivering successful products on time and that meet customer expectations.

At IBM, Matt designed logic, architectures, and algorithms for multi-gigabit serial transceivers. He verified the logic and algorithms in C++ and SystemC and developed Power Processing Element (PPE) controller code in C.

At National Instruments, Matt started his career as a hardware engineer. He developed multiple ASICs for standard bus interfaces and data acquisition engines (ADC, DAC, Timer, DIO) and worked on PCI Express bus interface ASIC development, IP validation, and first-article validation. He was the designer and owner of several important HDL IP libraries that required deep technical knowledge and excellent communication skills to evangelize them.

As a staff engineer, Matt worked on international R&D programs, integrating acquired engineering talent into company development processes and leading the successful release of a new product offering. He was recognized for his leadership with the Firefighter award. He worked on FPGA interface IP for multiple SoCs, ADCs, and DACs. He implemented FCC testing and approval for multiple product lines and was a technical organizer for the design, development, testing, and release of a family of USB data acquisition products, all released on the first revision. He led the PCB design, layout, and validation for all six of the USB product variants.

As a senior hardware engineer, Matt was a researcher of next-generation computer platform technologies, with an emphasis on multi-gigabit serial transceivers and high-data throughput applications. He became a technical guru for proprietary HDL IP and SoC ASICs. He was also a lecturer and teaching assistant for multiple internal PCI Express IP, HDL, and board-level training classes. He was an HDL technical supervisor for products across the company, including RF, Vision, FlexRIO, and Digitizers.

At Ohio State University, Matt worked on biosensor research, focusing on semiconductor and protein binding interfaces. He was an intern at GE Aircrafts Engines.

Matt has co-authored and published several research papers in the Journal of the Royal Society Interface and Acta Biomaterialia. He also co-authored a paper for the FutureTruck competition as the electrical team leader for the team from Ohio State University. His team was one of 15 selected across the US and Canada to convert a 2002 Ford Explorer into a more fuel-efficient and environmentally friendly SUV.

Matt has always had an interest in how engineering can help improve medicine and health. He is also passionate about education and served as a technical mentor in the AusTIN CANs Robotics Team for more than four years.

Matt graduated with a BS in Electrical and Computer Engineering and an MS in Electrical Engineering, with research focused on semiconductor physics and microbiology.